1. Field of the Invention
In the context of this application, a hearing aid is an electronic device for alleviating a hearing loss of a human. Being small enough to be worn in or behind the ear, the hearing aid picks up sounds from the environment using one or more microphones and amplifies the sounds electrically according to a hearing aid prescription. Contemporary hearing aids rely heavily on digital signal processing, whereby the electrical signals from the hearing aid microphones are converted into digital signals by a digital signal processor present in the hearing aid, and digital representations of the amplified signals are converted back into electrical signals suitable for driving an output transducer of the hearing aid, said transducer converting the electrical signals into sound waves perceivable to the hearing aid user.
The parts of the hearing aid performing the digital processing of audio signals in the hearing aid, in the following denoted the digital processing core, consumes a significant amount of the total power in a contemporary hearing aid, i.e. up to 50% or more of the total available power, mainly due to the increase in circuit complexity. This complexity is the result of the increasing amount of functions and the still more advanced digital processing each generation of hearing aids are designed to perform.
Part of the solution to the increase in complexity has been a decrease in microelectronic chip technology scale, with current designs utilizing sub-micron chip fabrication processes below 130 nanometers or smaller. The smaller technology scale implies an inherent decrease in power consumption, but also allows for the implementation of larger and more complex circuits, which, in turn, consume yet more power. Before introduction of the sub-micron processes, the threshold voltage Vt of MOS transistors decreased with the process scale. In sub-micron processes, however, this is not the case because of an increase in leakage current in these technologies. The sub-micron process technologies thus have relatively high Vt and are comparatively slower.
Recently, special low-Vt MOS technologies have become available to chip designers. Low-Vt MOS transistors are capable of operating at a higher speed, and may be freely mixed in chip designs with high-Vt MOS transistors. High-Vt MOS transistors are comparatively slower than low-Vt transistors, need a higher supply voltage in order to operate, and they are typically used for low-power applications, whereas the low-Vt transistors may operate at a lower supply voltage, but have a higher current leakage than the high-Vt transistors.
Battery cells for hearing aid applications are usually of the zinc-air variety, and have a standard voltage ranging from 1.6 volts (when new) to about 1.0 volts (when almost depleted), and a nominal voltage of 1.2 volts. If MOS transistors with a low Vt are to be used, such transistors may be operated at a very low voltage, e.g. about 500 mV, but the current leakage from the transistors is fairly high, and the gain is lower. At such a low voltage transistors also have a reduced speed capability.
A substantial amount of power may be saved by running a circuit at a voltage of 500 mV, but although low-Vt transistors may operate at 500 mV at the same speed as high-Vt transistors operating at 700 mV, the problem of current leak and gain has to be solved if any significant amount of power is to be saved. The power consumption of a microelectronic circuit is proportional to the supply voltage squared. If the supply voltage is lowered from 700 mV to 500 mV, the reduction in power consumption yielded from this operation is about 50%.
2. The Prior Art
A practical way of providing a suitably low supply voltage for low-Vt transistors is to use a switched-capacitor voltage converter to scale down the voltage to the 500 mV needed by the low-Vt MOS transistors. A 2:1 switched-capacitor voltage converter is particularly simple to implement, taking up very little space on the circuit chip. A switched-capacitor voltage converter consumes no significant power in itself, provides a very stable voltage reduction, has an optimal power transfer configuration, and a 2:1 voltage converter provides the necessary headroom for a 1.2 volt battery to be able to drive the digital processing core at 500 mV during the major part of the battery lifetime.
A 2:1 switched-capacitor voltage converter requires a stable input voltage twice the output voltage, and is therefore only capable of providing sufficient power to a hearing aid circuit if the battery voltage is sufficiently high to provide this voltage in a stable manner. A linear voltage regulator capable of feeding the switched-capacitor voltage converter from the battery may be configured to provide the stable reference voltage even if the battery voltage varies.
Powering a MOS transistor circuit at a lower voltage means that the transistors operate close to their Vt, which results in a high increase in the statistical spread on various transistor parameters from one device to another. Inherently, the sub-micron processes result in a greater parameter spread due to the reduced physical dimensions of the semiconductor elements, but the effect is even greater when operating at low voltages.
One of the transistor parameters is the drive strength or gain, i.e. the ability of the semiconductor element to amplify a signal, or, in a digital circuit, the ability to start drawing current when a voltage is present on the MOS transistor gate. If the spreading of drive strength is too large, the behaviour of the actual circuit may be very different from the design specifications, and large variations in parameters from one circuit to the next may reduce the useful die yield from a single wafer to an unacceptably low percentage, significantly increasing production costs. Especially, the parameters determining the timing constants of the individual transistors are critical. It would thus be beneficial to be able to reduce parameter spread in low-voltage MOS transistor circuits in an effective and simple manner.
If MOS transistors with a high Vt are used, there is a limit in their switching frequency at low voltages. This limits the useable clock frequency, and thus the complexity of the signal processing that may be performed by a hearing aid designed using this technology. In order to reduce spread and current leak, it is possible to adjust the bulk voltage potential of high-Vt transistors even when operating at 500 mV, but at the risk of compromising stable operation. If the difference between the bulk voltage potential and the source terminal voltage potential becomes large enough, the PN junction constituting these two semiconductor layers of the MOS transistor may start to conduct current, effectively turning the PN junction into a diode short-circuit within the MOS transistor, leading to possible erratic circuit behavoiur.
If a microelectronic circuit of this kind is to be useable when powered at a supply voltage of 500 mV, it is highly beneficial to use MOS transistors having a low Vt. The aforementioned problems associated with low-voltage circuits may then be alleviated by controlling the bulk voltage potentials of the MOS transistors. This technique involves increasing the bulk voltage potential above the positive supply voltage for PMOS transistors and decreasing the bulk voltage potential below the negative supply voltage for NMOS transistors on the same circuit chip. This adjustment of the bulk voltage potential, which may be performed dynamically in an adaptive manner, has the effect of increasing the threshold voltage Vt of the transistors, and thus decrease the switching speed and current leakage. If the Vt is adjusted to be at the same level in all transistors, the parameter spread due to process and temperature is reduced, too.
The threshold voltage Vt for an NMOS transistor, denoted the body effect of MOS transistors, may be expressed as:Vt=Vt0+γ(√{square root over (2Φf+VSB)}−√{square root over (2Φf)})where Vt0 is the threshold voltage at 0 volts, VSB is the voltage potential between the source terminal and bulk, Φf is the surface voltage potential, and γ is the bulk threshold voltage potential. It may be shown that if Φf, Vt0 and γ are greater than zero, then Vt will increase if VSB is increased for the NMOS transistor. Similarly, it may be shown that Vt will decrease if VSB is decreased for a PMOS transistor.
WO-A1-01/50812 discloses a hearing aid having a switched-capacitor step-down voltage converter for providing certain parts of a digital hearing aid circuitry with a lower voltage than the nominal battery voltage. Although this step-down voltage converter in itself provides some power saving, it still draws a considerable amount of current from the battery when the battery is near depletion. Some critical parts in the hearing aid, e.g. the output converter for the hearing aid output transducer, cannot be powered at low voltages. A practical way of supplying power to a hearing aid over a wider range of battery voltages would thus be appreciated.
U.S. Pat. No. 7,307,858 B2 discloses an adaptive power supply circuit for use in a battery-powered, head worn communication device. The power supply circuit comprises a 2:3 switched-capacitor voltage converter and a linear voltage regulator. When the battery voltage is below 1.2-1.25 V, both the linear voltage regulator and the 2:3 switched-capacitor voltage converter provides the output voltage Vo. The 2:3 switched-capacitor voltage converter provides the lower voltage from the battery voltage by switching a network of capacitors at an adaptive clock frequency dependent on the load current. When the battery voltage falls below 1.2 V, the 2:3 switched-capacitor voltage converter is able to supply less and less current for the load. At a battery voltage of 3/2 of Vo, the switched-capacitor voltage converter is incapable of supplying the load with the necessary current, itself becoming more of a load to the linear voltage regulator, which as a consequence has to provide more and more of the power to the load as the battery voltage decreases.
If the battery voltage in this prior art circuit gets above the operative threshold, the switched-capacitor voltage converter decreases its switching frequency because the load current increases. This implies, in a first instance, that the total current drawn from the battery has an optimal value only at a battery voltage around
      V    bat    ≈                    R        o            ·              I        L              +                  (                  3          2                )            ⁢              V        DD            and, in a second instance, that the switching frequency has to vary considerably in order to control the output voltage. The optimal point is thus at the maimal clock frequency.
The first complication is that current drawn from the battery has a very narrow minimum value range around the operative threshold. The second complication is the variable frequency controlling the switched-capacitor voltage converter. Although this method of operating a switched-capacitor voltage converter allows for a very wide output voltage range, it would undoubtedly introduce interference frequencies into the circuit. These frequencies would occur arbitrarily in different parts of the circuit, and would be very difficult to eliminate, as they depend on the switching frequency, which again depends on the load current of the circuit.
U.S. Pat. No. 7,504,876 B1 discloses a substrate bias feedback control circuit for use in a microelectronic circuit. The purpose of the bias feedback control circuit is to reduce current leakage in a microelectronic circuit operating at a low voltage, e.g. 0.5-1 V, by controlling the bias voltage potential on the well or substrate of the microelectronic circuit. The bias feedback control circuit consists of two partial circuits, one circuit for controlling a negative bias voltage for a set of NMOS transistors, and one circuit for controlling a positive bias voltage for a set of PMOS transistors.
If a hearing aid circuit were proposed solely having means for controlling the bulk bias voltage potentials of the MOS transistors in the hearing aid circuit, no significant power would be saved. Although the leak currents of the MOS transistors would be decreased, the circuit would still lack means for decreasing the supply voltage in an energy-efficient manner.